EP1K50FC484-3N vs EP1K50FC484-1N Vergleich

Detaillierter Direktvergleich von EP1K50FC484-3N von Intel und EP1K50FC484-1N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1K50FC484-3N EP1K50FC484-1N
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $19,50 $21,40
Family ACEX-1K ACEX-1K
Logic Elements / Cells 2880 —
Typical Gates 50,000 —
Embedded Memory Bits 40,960 bits —
Logic Array Blocks (LABs) 360 360
Maximum User I/O 249 —
Maximum Operating Frequency 166.67 MHz —
Process Technology 0.22 um CMOS 0.22 µm CMOS
Core Supply Voltage 2.5 V —
I/O Voltage Support 1.8 V / 2.5 V / 3.3 V —
Gehäuse 484-ball FineLine BGA (FBGA) 484-ball FineLine BGA (FBGA)
Speed Grade -3 (commercial) -1 (commercial)
Programming Interface JTAG (in-system programmable) —
Design Software Altera Quartus II / MAX+PLUS II —
Betriebstemperatur 0C to +70C (commercial) [DATA_NEEDED: commercial grade temperature range]
RoHS-Status Unknown - confirm at order Compliant (lead-free "N" suffix)
Lead-Free / Halogen-Free Unknown - confirm at order —
Manufacturer — Intel (formerly Altera)
Logic Elements (LEs) — 2,880
Typical System Gates — 50,000
Maximum User I/O Pins — 249
Embedded Array Blocks (EABs) — 12
Embedded Memory (Bits) — 40,960
Maximum Internal Clock Frequency — 250 MHz
Core Supply Voltage (VCCINT) — 2.5 V
I/O Supply Voltage (VCCIO) — [DATA_NEEDED: VCCIO range]
Montageart — Surface Mount
Configuration Method — SRAM, JTAG (IEEE 1149.1)

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