EP1K50QC208-3 vs EP1K50QC208-3Q Vergleich
Detaillierter Direktvergleich von EP1K50QC208-3 von Altera und EP1K50QC208-3Q von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1K50QC208-3 | EP1K50QC208-3Q |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $12,10 | $20,10 |
| Family | ACEX 1K | ACEX 1K |
| Logic Elements / Cells | 2,880 | — |
| Typical Gates | 50,000 | — |
| RAM Bits | 40,960 | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| Embedded Array Blocks (EABs) | 12 | 12 |
| User I/O Pins | 147 | — |
| Maximum Operating Frequency | 166.67 MHz | 166.67 MHz |
| Speed Grade | -3 | -3 (standard commercial) |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Gehäuse | 208-pin PQFP (BFQFP) | 208-pin PQFP (Plastic Quad Flat Pack) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | Commercial (0°C to +70°C) [DATA_NEEDED: exact range] | — |
| Configuration Mode | Passive Serial, Active Serial, JTAG | — |
| I/O Standards | LVTTL, LVCMOS, PCI | — |
| Design Tool Support | Quartus II, MAX+PLUS II | — |
| RoHS-Status | unknown | — |
| Logic Elements | — | 2,880 cells |
| Equivalent Gates | — | 50,000 gates |
| Embedded Memory | — | 40,960 bits (12 EABs) |
| Maximum User I/O | — | 147 |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V tolerant |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Operating Temperature Grade | — | Q suffix — military/aerospace range |