EP1K50QC208-3N vs EP1K50QC208-1 Vergleich

Detaillierter Direktvergleich von EP1K50QC208-3N von Altera und EP1K50QC208-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1K50QC208-3N EP1K50QC208-1
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $13,85 $11,40
Family ACEX-1K ACEX-1K
Typical Gates 50,000 —
Logic Elements (LEs) 2,880 —
Logic Array Blocks (LABs) 360 —
Embedded RAM 40,960 bits (10 EABs × 4,096 bits) —
Maximum User I/Os 147 —
Maximum Operating Frequency 166.67 MHz —
Pin-to-Pin Logic Delay 0.5 ns (typical, -3 speed grade) —
Process Technology 0.22 µm CMOS 0.22 um
Core Supply Voltage (VCCINT) 2.5 V —
I/O Supply Voltage (VCCIO) 3.3 V (PCI-compatible I/O banks) —
Gehäuse 208-pin PQFP / BFQFP (Plastic Quad Flat Pack) 208-BFQFP (PQFP208)
Montageart Surface Mount Surface Mount (Gull Wing)
Betriebstemperatur 0 °C to +70 °C (Commercial) —
Programming Interface IEEE 1149.1 JTAG + in-system configurable —
Lead-Free / RoHS Compliant (Pb-free terminal finish per 'N' suffix) —
Product Type — FPGA (Field Programmable Gate Array)
Number of Logic Elements — 2880
Number of LABs — 360
Total RAM Bits — 40960 bits
Total Gates — 50000 (50K gates)
User I/Os — 147
Core Supply Voltage — 2.5 V
Maximum Core Clock Frequency — 250 MHz
Speed Grade — -1
Anzahl der Pins — 208
Temperature Grade — Commercial
Manufacturer Status — Obsolete / Not recommended for new designs
RoHS-Status — unknown

Datenblätter & Ressourcen

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