EP1K50TI144-2N vs EP1K30TI144-2N Vergleich

Detaillierter Direktvergleich von EP1K50TI144-2N von Altera und EP1K30TI144-2N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1K50TI144-2N EP1K30TI144-2N
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $9,95 $25,00
Family ACEX-1K —
Logic Elements 40,960 —
Typical Gates 50,000 —
Logic Cells 2,880 —
Logic Array Blocks (LABs) 360 —
User I/O Count 102 —
Maximum Operating Frequency 166.67 MHz —
Process Technology 0.22 µm 0.22 µm CMOS SRAM
Embedded RAM Bits 40,960 (12 ESBs) —
Gehäuse 144-LQFP (TQFP, 0.5 mm pitch) 144-pin LQFP
Operating Voltage (VCCINT) 2.5 V —
Montageart Surface Mount Surface Mount
Betriebstemperatur -40C to +85C (industrial, "N" suffix) —
Speed Grade -2 (faster) -2
Configuration Method SRAM / JTAG (IEEE 1149.1) —
Lead-Free / RoHS Check supplier (ACEX-1K predates RoHS mandate) —
Series — ACEX-1K
Manufacturer — Intel (formerly Altera)
Logic Elements / Cells — 1728
Typical Gate Count — 30,000 gates
Embedded Memory (RAM bits) — 24,576 bits
Maximum User I/O — 102
Number of Logic Array Blocks (LABs) — [DATA_NEEDED: LAB count]
Number of Embedded Array Blocks (EABs) — [DATA_NEEDED: EAB count]
Core Voltage (VCCINT) — 2.5 V
I/O Voltage (VCCIO) — 2.5 V / 3.3 V
Operating Temperature Grade — Industrial
Betriebstemperaturbereich — -40 °C to +100 °C ambient
Lead Pitch — 0.5 mm
Configuration Interface — JTAG (IEEE 1149.1), serial passive/active
RoHS-Status — Compliant (per Utmel product note)
MSL-Level — [DATA_NEEDED: MSL rating]

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