EP1K50TI144-2N vs EP1K50TC144-2N Vergleich

Detaillierter Direktvergleich von EP1K50TI144-2N von Altera und EP1K50TC144-2N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1K50TI144-2N EP1K50TC144-2N
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $9,95 $22,45
Family ACEX-1K ACEX 1K Device Family (2.5 V)
Logic Elements 40,960 —
Typical Gates 50,000 50,000
Logic Cells 2,880 —
Logic Array Blocks (LABs) 360 360
User I/O Count 102 —
Maximum Operating Frequency 166.67 MHz —
Process Technology 0.22 µm 0.22 µm CMOS
Embedded RAM Bits 40,960 (12 ESBs) —
Gehäuse 144-LQFP (TQFP, 0.5 mm pitch) TQFP-144 (144-LQFP), 22 x 22 mm, 0.5 mm pitch
Operating Voltage (VCCINT) 2.5 V —
Montageart Surface Mount Surface Mount
Betriebstemperatur -40C to +85C (industrial, "N" suffix) —
Speed Grade -2 (faster) —
Configuration Method SRAM / JTAG (IEEE 1149.1) —
Lead-Free / RoHS Check supplier (ACEX-1K predates RoHS mandate) —
Series — ACEX-1K
Maximum Gates — 100,000
Logic Elements (Cells) — 2,880
Embedded Memory (EAB) — 40,960 bits (12 EABs x 4,096 bits)
User I/Os — 102
Anzahl der Pins — 144
Core Voltage (VCCINT) — 2.5 V
I/O Voltage (VCCIO) — 2.5 V / 3.3 V (multi-standard)
Internal Frequency — Up to 200 MHz
Propagation Delay (speed grade) — 0.4 ns nominal (speed grade -2)
Operating Temperature Grade — Commercial (suffix N)
Configuration — Serial, JTAG, supported configuration devices (EPC, EPC2)
RoHS-Status — [DATA_NEEDED: rohs status]
Lead-Free — [DATA_NEEDED: lead-free status]

Datenblätter & Ressourcen

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