EP1M120F484-I6 vs EP1M120F484C5N Vergleich
Detaillierter Direktvergleich von EP1M120F484-I6 von Altera und EP1M120F484C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1M120F484-I6 | EP1M120F484C5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $98,50 | $89,50 |
| Family | Mercury FPGA | Mercury |
| Logic Elements (LEs) | 4,800 | — |
| Equivalent Gates | 120,000 | — |
| Logic Array Blocks (LABs) | 480 | 480 |
| User I/Os | 303 | 303 |
| High-Speed Transceivers | Up to 12 channels | — |
| Transceiver Data Rate | Up to 1.25 Gbps per channel | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.18 µm CMOS | 0.18 micron CMOS |
| Gehäuse | 484-pin FBGA (FineLine BGA) | 484-pin FC-FBGA (FineLine BGA, 23 mm x 23 mm) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | -40 °C to +100 °C (industrial) | 0 C to 85 C (Commercial) |
| Speed Grade | -6 | C5 |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, JTAG, EPC device | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL | — |
| Logic Elements / Cells | — | 4,800 (120K equivalent gates) |
| Core Supply Voltage | — | 1.8 V (1.71 V to 1.89 V) |
| Integrated Transceivers | — | Yes, with CDR up to 1.25 Gbps |
| RoHS-Status | — | [DATA_NEEDED: RoHS status - not stated in retrieved data] |
| MSL-Level | — | [DATA_NEEDED: MSL level - not stated in retrieved data] |
| Lead-Free | — | [DATA_NEEDED: lead-free status - not stated in retrieved data] |
| Halogenfrei | — | [DATA_NEEDED: halogen-free status - not stated in retrieved data] |