EP1M120F484 vs EP1M120F484C5N Vergleich
Detaillierter Direktvergleich von EP1M120F484 von Altera und EP1M120F484C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1M120F484 | EP1M120F484C5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $92,00 | $89,50 |
| Family | Mercury (EP1M) | Mercury |
| Logic Elements / Cells | 4,800 | 4,800 (120K equivalent gates) |
| Gate Count | 120,000 | — |
| Embedded Memory (Bits) | 49,152 | — |
| User I/O Pins | 303 | — |
| Total Package Pins | 484 | — |
| Gehäuse | 484-pin FineLine BGA (FCBGA) | 484-pin FC-FBGA (FineLine BGA, 23 mm x 23 mm) |
| Core Supply Voltage | 1.8 V | 1.8 V (1.71 V to 1.89 V) |
| I/O Supply Voltage | 3.3 V / 2.5 V | — |
| Transceiver Channels | Up to 18 channels | — |
| Max Transceiver Data Rate | 1.25 Gbps with CDR | — |
| Speed Grade (this P/N) | Not specified in provided data [DATA_NEEDED: speed grade] | — |
| Process Technology | CMOS | 0.18 micron CMOS |
| Configuration Interface | JTAG (IEEE 1149.1) / EPC serial | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Unknown [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - not stated in retrieved data] |
| Betriebstemperatur | Unknown [DATA_NEEDED: operating temperature range] | 0 C to 85 C (Commercial) |
| Logic Array Blocks (LABs) | — | 480 |
| User I/Os | — | 303 |
| Integrated Transceivers | — | Yes, with CDR up to 1.25 Gbps |
| Speed Grade | — | C5 |
| MSL-Level | — | [DATA_NEEDED: MSL level - not stated in retrieved data] |
| Lead-Free | — | [DATA_NEEDED: lead-free status - not stated in retrieved data] |
| Halogenfrei | — | [DATA_NEEDED: halogen-free status - not stated in retrieved data] |