EP1M350F780C6 vs EP1M350F780C6N Vergleich
Detaillierter Direktvergleich von EP1M350F780C6 von Intel und EP1M350F780C6N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1M350F780C6N - Mercury 350K FPGA, 486 I/O, 780-BGA | Intel (Altera)
EP1M350F780C6N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1M350F780C6 | EP1M350F780C6N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $905,00 | $219,40 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Mercury FPGA | — |
| Logic Family | CMOS | CMOS, SRAM-based LUT |
| Number of User I/Os | 486 | — |
| Total Pins / Balls | 780 | — |
| Gehäuse | 780-FBGA (FineLine BGA), 29 mm x 29 mm | 780-ball FC-FBGA (FINE LINE BGA-780) |
| Montageart | Surface Mount | — |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V) | 1.8 V |
| Betriebstemperatur | 0 C to 85 C (TJ, commercial grade) | 0 C to 85 C |
| Integrated Transceivers | Yes, up to 1.25 Gbps with CDR support | Yes, with CDR up to 1.25 Gbps |
| Logic Elements / LUTs | [DATA_NEEDED: logic element count] | — |
| On-chip Memory | [DATA_NEEDED: embedded memory size] | — |
| RoHS-Status | Non-compliant (per one distributor listing) | [DATA_NEEDED: rohs_status] |
| Lead Free Status | [DATA_NEEDED: lead-free status] | — |
| Package Style | Bulk tray per distributor listings | — |
| Device Type | FPGA (Field Programmable Gate Array) | Loadable Programmable Logic Device (PLD) / FPGA |
| Programmable Logic Type | In-system programmable | — |
| Family | — | Mercury (EP1M350) |
| System Gates | — | 350,000 |
| Logic Cells / Elements | — | 14,400 |
| User I/Os | — | 486 |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | S-PBGA-B780 |
| Configuration Interface | — | JTAG (IEEE 1149.1) / passive serial |
| MSL-Level | — | [DATA_NEEDED: msl_level] |
| Lead-Free | — | [DATA_NEEDED: lead_free] |
| Architecture | — | Look-up table (LUT)-based, optimized for high-speed serial I/O |
| Total Package Pins / Balls | — | 780 |