EP1S10F672C7 vs EP1S10B672C7 Vergleich
Detaillierter Direktvergleich von EP1S10F672C7 von Altera und EP1S10B672C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1S10B672C7 - Stratix 10570 LEs FPGA, 672-BGA | Intel
EP1S10B672C7 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1S10F672C7 | EP1S10B672C7 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $158,00 | $140,00 |
| Family | Stratix | — |
| Logic Elements | 10,570 | 10,570 |
| Embedded Memory | 920,448 bits | — |
| User I/Os | 345 | — |
| Gehäuse | 672-pin FBGA (FineLine BGA) | — |
| Package Dimensions | 35 x 35 mm, 1.27 mm pitch | 35 x 35 mm |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Core Voltage (VCCINT) | 1.5 V | — |
| Logic Cells | 10,570 | — |
| LABs (Logic Array Blocks) | 1,057 | — |
| Betriebstemperatur | 0 C to 85 C (Commercial) | 0 °C to 85 °C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| I/O Standards | LVTTL, LVCMOS, LVDS, SSTL, HSTL | — |
| Configuration Mode | JTAG, Passive Serial, Active Serial | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS compliance] |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | Stratix |
| Embedded Memory (Total) | — | 920 Kbits |
| DSP Blocks | — | Yes (DSP multiplier blocks) |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| Supply Voltage (Core) | — | 1.5 V |
| Package Type | — | 672-ball FineLine BGA |
| Ball Pitch | — | 1.27 mm |
| Logic Family | — | CMOS |
| Temperature Grade | — | Commercial (C) |
| Speed Grade | — | 7 |
| Configuration Method | — | JTAG / EPC serial configuration |