EP1S20B672C7N vs EP1S10B672C7N Vergleich

Detaillierter Direktvergleich von EP1S20B672C7N von Intel und EP1S10B672C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1S20B672C7N EP1S10B672C7N
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $320,00 $67,90
Series Stratix —
Family Stratix (original) —
Process Technology 0.13 µm CMOS —
Logic Elements (LEs) 18,460 —
LABs / CLBs 1,846 —
Embedded Memory Bits 1,669,248 bits —
Maximum User I/O 426 —
Number of Pins / Balls 672 —
Package Type 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) —
Supply Voltage (Core, VCCINT) 1.5 V —
Betriebstemperatur 0 °C to 85 °C (Commercial Extended) —
Speed Grade -7 —
Montageart Surface Mount (BGA) —
MSL-Level 3 (per JEDEC J-STD-020) —
Logic Family CMOS CMOS
RoHS-Status [DATA_NEEDED: RoHS compliance] —
Lead-Free [DATA_NEEDED: lead-free status] —
Manufacturer — Intel / Altera
Product Family — Stratix
Logic Elements/Cells — 10570 cells
Maximum Internal Clock — 420.17 MHz
Core Supply Voltage — 1.5 V
Technology Node — 130 nm
Package Code — BGA
Number of Terminals — 672
Package Body Size — 35 x 35 mm
Ball Pitch — 1.27 mm
Package Shape — Square
Temperature Grade — Commercial extended, 0 to 85 C
Terminal Form — Ball
Configuration/JTAG — JTAG boundary-scan per Stratix family data sheet
Number of User I/O in 672-BGA — [DATA_NEEDED: user I/O count]
Total RAM Bits — [DATA_NEEDED: total RAM bits]
Embedded PLLs — [DATA_NEEDED: PLL count]
Config Device Compatibility — [DATA_NEEDED: supported configuration devices]
RoHS — unknown - N suffix may indicate Pb-free, not verified in fetched data

Datenblätter & Ressourcen

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