EP1S20F672I7 vs EP1S20F672C6 Vergleich
Detaillierter Direktvergleich von EP1S20F672I7 von Intel und EP1S20F672C6 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera
EP1S20F672I7 ⚠ Letzte Bestellmöglichkeit
Spezifikationsvergleich
| Parameter | EP1S20F672I7 | EP1S20F672C6 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $199,50 | $470,00 |
| Family | Stratix (first generation) | Stratix (first generation) |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Maximum RAM Bits | 1,669,248 | — |
| DSP Blocks | [DATA_NEEDED: exact DSP block count] | — |
| Maximum User I/Os | 426 | 426 |
| Supply Voltage (VCCINT core) | 1.5 V | — |
| Logic Family | CMOS | — |
| Gehäuse | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch | 672-ball FineLine BGA |
| Betriebstemperatur | -40C to +85C (industrial grade, I7 suffix) | 0°C to +85°C (Commercial) |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| Number of Pins / Balls | 672 | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Clock Management PLLs | [DATA_NEEDED: PLL count] | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free / Finish | SnPb (e0 per Partstack datasheet extract) | — |
| MSL-Level | unknown | — |
| Status | Last Time Buy (per distributor notices) | — |
| Manufacturer | — | Altera (now Intel) |
| Series | — | Stratix |
| Process Technology | — | 0.13 µm CMOS |
| Logic Array Blocks (LABs) | — | 1,846 |
| Embedded Memory Bits | — | 1,669,248 |
| Package Code | — | F672 |
| Speed Grade | — | C6 |
| Versorgungsspannung | — | Core 1.5 V, I/O programmable |