EP1S20F780C6N vs EP1S20F780C7N Vergleich
Detaillierter Direktvergleich von EP1S20F780C6N von Intel und EP1S20F780C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1S20F780C6N - 18460 LEs Stratix FPGA, 780-FBGA | Intel
EP1S20F780C6N ⚠ Letzte Bestellmöglichkeit
Spezifikationsvergleich
| Parameter | EP1S20F780C6N | EP1S20F780C7N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $188,75 | $158,40 |
| Family | Stratix | — |
| Manufacturer | Intel (formerly Altera) | Intel (formerly Altera) |
| Process Technology | 130 nm CMOS | CMOS |
| Logic Elements (LEs) | 18,460 | — |
| Configurable Logic Blocks (CLBs) | 2,132 | — |
| Embedded Memory Bits | 1,669,248 | — |
| Speichertyp | TriMatrix (M512 / M4K / M-RAM blocks) | — |
| DSP Blocks | Embedded 9x9 multiplier blocks | — |
| Maximum User I/O Pins | 586 | — |
| Gehäuse | 780-ball FC-FBGA (Fine-pitch BGA) | 780-BBGA, FCBGA (29 x 29 mm, 1.0 mm pitch) |
| Package Dimensions | 29 x 29 mm, 1.0 mm pitch | — |
| Core Supply Voltage | 1.5 V | — |
| Betriebstemperatur | 0 C to +85 C (commercial) | 0 C to 85 C (Commercial) |
| Speed Grade | C6 (6 ns pin-to-pin delay class) | -7 |
| Maximum Internal Frequency | 450.05 MHz | — |
| Lead-Free / RoHS | Yes (lead-free) | — |
| Configuration Methods | PS, PPS, PPA, JTAG via EPC configuration device | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS, SSTL, HSTL, PCI, PCI-X | — |
| Series | — | Stratix |
| Logic Elements / Cells | — | 18,460 |
| Number of LABs/CLBs | — | 1,846 |
| Total RAM Bits | — | 1,669,248 |
| Number of User I/Os | — | 586 |
| Package Code | — | 780-FBGA |
| Supply Voltage (Core) | — | 1.5 V |
| Montageart | — | Surface Mount |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |
| Embedded DSP Blocks | — | Yes |
| PLLs | — | Yes (multiple) |