EP1S25B672C7 vs EP1S20B672C7N Vergleich
Detaillierter Direktvergleich von EP1S25B672C7 von Intel und EP1S20B672C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S25B672C7 | EP1S20B672C7N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $175,00 | $320,00 |
| Family | Stratix | Stratix (original) |
| Logic Cells | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| Embedded Memory (bits) | 1,944,576 | — |
| Maximum User I/O | 473 | 426 |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Maximum Internal Frequency | 420.17 MHz | — |
| Number of PLLs | [DATA_NEEDED: PLL count] | — |
| Gehäuse | 672-BGA, 35 x 35 mm, 1.27 mm pitch | — |
| Pin-Anzahl | 672 | — |
| Speed Grade | C7 (commercial, slowest bin) | -7 |
| Betriebstemperatur | 0 C to 85 C | 0 °C to 85 °C (Commercial Extended) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Configuration Method | SRAM-based (volatile, requires config device) | — |
| Logic Family | CMOS | CMOS |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 18,460 |
| LABs / CLBs | — | 1,846 |
| Embedded Memory Bits | — | 1,669,248 bits |
| Number of Pins / Balls | — | 672 |
| Package Type | — | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) |
| Supply Voltage (Core, VCCINT) | — | 1.5 V |
| MSL-Level | — | 3 (per JEDEC J-STD-020) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |