EP1S25F672C7N vs EP1S25F672C6N Vergleich
Detaillierter Direktvergleich von EP1S25F672C7N von Altera und EP1S25F672C6N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S25F672C7N | EP1S25F672C6N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $535,00 | $192,75 |
| Device Family | Stratix | — |
| Logic Elements (LEs) | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | 2,566 |
| Embedded Memory Bits | 1,944,576 | — |
| Maximum User I/O | 473 | 473 |
| Number of I/O Pins | 672 (BGA balls) | — |
| Gehäuse | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch | 672-BBGA / 672-FBGA (FineLine BGA) |
| Process Technology | 0.13 µm CMOS | CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] | — |
| Betriebstemperatur | 0 °C to 85 °C (commercial) | 0 C to +85 C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| Configuration Method | JTAG / Passive Serial / Active Serial | — |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| RoHS-Status | [DATA_NEEDED: confirm from product page] | Compliant |
| Family | — | Stratix |
| Series | — | Stratix I |
| Logic Elements | — | 25,660 |
| Embedded Memory (bits) | — | 1,944,576 |
| Package Body Size | — | 35 mm x 35 mm |
| Ball Pitch | — | 1.27 mm |
| Supply Voltage (Core) | — | 1.5 V |
| Configuration | — | SRAM-based, requires configuration device |
| Lead-Free | — | Yes |