EP1S40F1020C5DM vs EP1S40F1020C5 Vergleich
Detaillierter Direktvergleich von EP1S40F1020C5DM von Intel und EP1S40F1020C5 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S40F1020C5DM | EP1S40F1020C5 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $198,00 | $165,00 |
| Product Type | FPGA - Field Programmable Gate Array | — |
| Series | Stratix | Stratix I |
| Logic Elements | 41,250 | 41,250 |
| Embedded Memory | 3,423 Kbits TriMatrix | 3.4 Mbits (TriMatrix) |
| User I/O Count | 773 | — |
| Number of LABs/CLBs | 4125 | — |
| DSP Blocks | 12 (up to 28.8 GMACS at 200 MHz) | Yes (dedicated hardware multipliers) |
| Number of PLLs | 6 (8 outputs each) | — |
| Number of Clock Networks | 16 | — |
| Gehäuse | 1020-ball FineLine BGA (33 mm x 33 mm, 1.0 mm pitch) | 1020-ball FC-FBGA (33 mm x 33 mm) |
| Core Voltage VCCINT | 1.5 V | — |
| I/O Voltage VCCIO | 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| Process Technology | 0.13 µm CMOS | 130 nm |
| Betriebstemperatur | 0C to +85C (commercial) | 0C to +85C (Commercial) |
| Configuration Modes | PS, PPS, PPA, JTAG | — |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Family | — | Stratix |
| Logic Array Blocks (LABs) | — | 4,125 |
| Maximum User I/Os | — | 773 |
| Core Voltage | — | 1.425 V to 1.575 V |
| Speed Grade | — | C5 |
| Maximum Internal Clock | — | up to 500 MHz |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS, PCI |