EP1S60F1020C5 vs EP1S60F1020C6N Vergleich
Detaillierter Direktvergleich von EP1S60F1020C5 von Intel und EP1S60F1020C6N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1S60F1020C5 - 57K-Cell Stratix FPGA, 1020-BGA | Altera/Intel
EP1S60F1020C5 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1S60F1020C5 | EP1S60F1020C6N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $171,00 | $195,00 |
| Series | Stratix | Stratix |
| Family | Stratix (EP1S) | Stratix (EP1S) |
| Logic Elements | 57,120 | — |
| Configurable Logic Blocks (CLBs) | 6,570 | — |
| Total RAM Bits | 5,215,104 (5.2 Mbit) | — |
| User I/O Pins | 773 | — |
| Number of PLLs | 12 | — |
| Core Voltage | 1.5 V | — |
| I/O Voltage Tolerance | 3.3 V (multi-standard) | — |
| Betriebstemperatur | 0 C to 85 C (Commercial) | 0°C to +85°C (Commercial) |
| Package Type | FBGA-1020 (FineLine BGA) | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch |
| Package Dimensions | 33 x 33 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 0.13 µm CMOS, 1.5 V core | — |
| Speed Grade | C5 | C6 (mid-tier) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Logic Elements (LEs) | — | 57,120 |
| Logic Cells | — | 6,570 blocks (per chipdig datasheet summary) |
| Embedded RAM (Total Bits) | — | 5,215,104 bits |
| Embedded Multipliers | — | 773 (18x18) |
| Maximum User I/O Pins | — | Per datasheet, package-dependent (F1020 variant) |
| Logic Family / Process | — | CMOS, 0.13 µm |
| Versorgungsspannung | — | Per datasheet (Stratix Device Handbook Vol. 1) |
| Lead-Free / Pb-Free | — | Yes (suffix 'N') |
| RoHS-Status | — | Compliant (per 'N' suffix) |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins |
| PLL Count | — | 12 (per Stratix family datasheet) |
| Memory Block Types | — | TriMatrix (M512, M4K, M-RAM) |