EP1S80F1020I7NGA vs EP1S80F1020C6 Vergleich
Detaillierter Direktvergleich von EP1S80F1020I7NGA von Intel und EP1S80F1020C6 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S80F1020I7NGA | EP1S80F1020C6 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $188,00 | $1.180,00 |
| Family | Stratix (EP1S) | — |
| Logic Elements | 79,040 | 79,040 |
| Total Memory Bits | 7,427,520 bits | — |
| DSP Blocks | 22 | — |
| Embedded Transceivers | 12 channels (600 Mbps to 3.1875 Gbps) | — |
| Maximum User I/O | 773 | — |
| Gehäuse | 1020-ball FineLine BGA (33 × 33 mm, 1.00 mm pitch) | — |
| Process Node | 0.13 µm CMOS | — |
| Betriebstemperatur | -40 °C to +100 °C (Industrial) | — |
| Supply Voltage (Core) | 1.5 V | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, LVDS, LVPECL, PCI, PCI-X, HSTL, LVDS, HyperTransport | — |
| Maximale Taktfrequenz | Up to 420 MHz (device-dependent) | — |
| PLL Count | 12 (enhanced PLLs and fast PLLs) | — |
| Configuration Method | JTAG, EPC16/EPC8 serial or parallel configuration device, passive/active serial | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | [DATA_NEEDED: rohs status] |
| Lead-Free | Yes | — |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| Series | — | Stratix |
| Total RAM Bits | — | 7,427,520 |
| Number of Logic Blocks / LABs | — | 9,191 |
| Number of I/O Pins (max) | — | 773 user I/O |
| Number of Pins / Balls | — | 1020 |
| Package Type | — | FC-FBGA (flip-chip fine-pitch BGA), 33 x 33 mm, 1.0 mm pitch |
| Process Technology | — | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.5 V nominal (1.425 V to 1.575 V) |
| Speed Grade | — | C6 |
| Operating Temperature (Commercial) | — | 0 C to +85 C |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| Family Description | — | FPGA - Field Programmable Gate Array |
| Embedded Memory | — | TriMatrix (three block sizes, true/simple dual-port) |
| Configuration Interface | — | JTAG (IEEE 1149.1) + serial/parallel configuration device |
| Design Tool | — | Quartus II (legacy, Stratix family) |