EP1SGX25CF780I6 vs EP1S25F780I6 Vergleich
Detaillierter Direktvergleich von EP1SGX25CF780I6 von Altera und EP1S25F780I6 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1SGX25CF780I6 - Stratix GX FPGA 25K LE 780-BGA Industrial | Altera
EP1SGX25CF780I6 ObsoleteSpezifikationsvergleich
| Parameter | EP1SGX25CF780I6 | EP1S25F780I6 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $185,00 | $162,00 |
| Family | Stratix GX | Stratix |
| Logic Elements | 25,660 | — |
| Embedded RAM Bits | 1,944,576 | — |
| Number of LABs/CLBs | 2566 | — |
| User I/Os | 597 | — |
| Operating Voltage (Core) | 1.5 V | — |
| Speed Grade | I6 (industrial) | — |
| Betriebs-Sperrschichttemperatur | -40C to +100C | — |
| Gehäuse | 780-ball BGA (FineLine BGA) | 780-ball FBGA (FineLine BGA, 29 x 29 mm, 1 mm pitch) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Number of High-Speed Transceivers | Up to 20 channels | — |
| Transceiver Data Rate | Up to 3.1875 Gbps per channel | — |
| Configuration | SRAM-based (requires configuration device at every power-up) | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Lead Free | Yes | — |
| MSL-Level | [DATA_NEEDED: MSL moisture sensitivity level] | [DATA_NEEDED: MSL rating] |
| Logic Elements (LE) | — | 25,660 |
| Logic Array Blocks (LAB) | — | 2,566 |
| Total RAM Bits | — | 1,944,576 |
| DSP Blocks | — | 28 |
| Embedded Multipliers | — | 9-bit x 9-bit, in DSP blocks |
| User I/O Count | — | 597 |
| Process Node | — | 0.13 µm all-layer copper SRAM |
| Core Voltage VCCINT | — | 1.5 V typical |
| Betriebstemperatur | — | 0 °C to +85 °C (Industrial, -I6 grade) |
| Maximum Internal Frequency | — | [DATA_NEEDED: internal fMAX per logic cell] |