EP1SGX25DF1020C6ES vs EP1SGX25DF1020C6ESL Vergleich
Detaillierter Direktvergleich von EP1SGX25DF1020C6ES von Altera und EP1SGX25DF1020C6ESL von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1SGX25DF1020C6ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera
EP1SGX25DF1020C6ES ⚠ Letzte BestellmöglichkeitAltera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL ObsoleteSpezifikationsvergleich
| Parameter | EP1SGX25DF1020C6ES | EP1SGX25DF1020C6ESL |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $285,00 | $1.095,00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25660 cells | 25,660 |
| Configurable Logic Blocks (CLBs) | 2566 | — |
| Maximum User I/Os | 607 | — |
| Number of LABs/CLBs | 2566 | — |
| Total RAM Bits | [DATA_NEEDED: total RAM bits] | 1,944,576 bits |
| Betriebstemperatur | 0 C to 85 C | — |
| Supply Voltage (Core) | 1.5 V | — |
| Process Technology | 130 nm CMOS | — |
| Logic Family | CMOS | — |
| Gehäuse | FBGA-1020, 33 mm × 33 mm, 1.00 mm pitch | 1020-BBGA (FineLine BGA) |
| Montageart | Surface Mount | Surface Mount |
| Lead-Free | Yes | — |
| RoHS-Status | [DATA_NEEDED: confirm RoHS] | [DATA_NEEDED: RoHS status] |
| Configuration Interface | JTAG / Passive Serial / Passive Parallel | — |
| Embedded Transceivers | Yes (multi-gigabit) | — |
| DSP Blocks | Yes | Yes (embedded DSP blocks) |
| User I/O Pins | — | 607 |
| LABs/CLBs | — | 2,566 |
| Core Voltage | — | 1.5 V |
| Betriebs-Sperrschichttemperatur | — | 0 C to 85 C |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Process Node | — | 0.13 um CMOS |
| Transceivers | — | Embedded multi-gigabit transceivers (per Stratix GX family) |
| Speed Grade | — | C6 |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) |