EP1SGX25DF800I7N vs EP1SGX25DF800C5N Vergleich
Detaillierter Direktvergleich von EP1SGX25DF800I7N von Intel und EP1SGX25DF800C5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1SGX25DF800I7N - 25,660 LEs Stratix GX FPGA, 16 GXB, FBGA-800 | Intel / Altera
EP1SGX25DF800I7N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1SGX25DF800I7N | EP1SGX25DF800C5N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $215,00 | $158,00 |
| Series | Stratix GX | — |
| Family Name | Stratix GX (EP1SGX25) | — |
| Logic Elements | 25,660 | — |
| Registers | 26,274 | — |
| Embedded Memory | 1,944,576 bits | — |
| GXB Transceiver Channels | 16 (max) | — |
| GXB Data Rate | Up to 3.125 Gbps per channel | — |
| I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Standards Supported | LVDS, LVTTL, LVPECL, PCI, PCI-X, SSTL, HSTL, 1.5 V PCML/PECL | — |
| PLLs | Up to 12 | Up to 40 (device-wide) |
| Gehäuse | FBGA-800 (FineLine BGA) | FBGA-800 (FineLine BGA, 31x31 mm) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Betriebstemperatur | -40C to +100C (industrial, 'I' grade) | 0C to +85C (commercial) |
| Speed Grade | -7 (industrial) | C5 (commercial) |
| Configuration | JTAG or Passive Serial (EPCSxx) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status not in verified data] | — |
| Family | — | Stratix GX |
| Device Logic Elements | — | 25,660 (typical) |
| Transceiver Channels | — | 8 (full-duplex) |
| Maximum Transceiver Data Rate | — | 3.1875 Gbps per channel |
| Process Technology | — | 130 nm |
| Supply Voltage (Core) | — | 1.5 V typical |
| Lead-Free / RoHS Status | — | Lead-free (N suffix) |
| On-Chip Memory (TriMatrix) | — | Approx. 2 Mbits total |
| Embedded 8b/10b Encoder/Decoder | — | Yes (one per transceiver channel) |
| PCI Express Hard IP | — | x1, x4 endpoints supported |
| DSP Blocks | — | Embedded multiplier blocks (family-wide) |
| MSL-Level | — | [DATA_NEEDED: MSL Level] |
| Development Software | — | Quartus II (legacy) |