EP1SGX25FF1020C5 vs EP1SGX25FF1020C5L Vergleich
Detaillierter Direktvergleich von EP1SGX25FF1020C5 von Altera und EP1SGX25FF1020C5L von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1SGX25FF1020C5 | EP1SGX25FF1020C5L |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $171,00 | $105,00 |
| Family | Stratix GX | Stratix GX |
| Series | Stratix | — |
| Logic Elements | 25,660 | 25,660 cells |
| LABs/CLBs | 2,566 | — |
| Total Memory Bits | 1,694,720 bits (1.69 Mbit) | — |
| Number of I/O | 607 | — |
| Supply Voltage (Core) | 1.5 V | — |
| Multi-Gigabit Transceivers | [DATA_NEEDED: MGT count for FF1020 package variant] | — |
| Embedded PLLs | 6 | — |
| Embedded Multipliers (DSP blocks) | [DATA_NEEDED: DSP block count] | — |
| Logic Family | CMOS | — |
| Process Technology | 130 nm | 130 nm CMOS |
| Betriebstemperatur | 0 C to 85 C (commercial) | [DATA_NEEDED: operating temperature range] |
| Speed Grade | C5 | C5 (slowest tier) |
| Package Type | FC-FBGA-1020 (33 x 33 mm, 1 mm pitch) | FC-FBGA (Flip-Chip Fine-pitch Ball Grid Array) |
| Montageart | Surface Mount | Surface Mount |
| Lead Free | Yes | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS compliance] |
| Configuration Modes | PS, PPS, FPP, JTAG | — |
| Design Tool | Quartus II / Quartus Prime | — |
| Pin-Anzahl | — | 1020 balls |
| Core Voltage | — | 1.5 V |
| Maximum Transceiver Data Rate | — | 3.125 Gbps |
| Maximum Operating Frequency | — | 5000 MHz (internal reference) |
| Memory Architecture | — | TriMatrix (M512/M4K/M-RAM blocks) |
| I/O Standards Supported | — | LVDS, LVTTL, LVCMOS, HSTL, SSTL |
| Configuration Scheme | — | Active serial (EPCS), passive serial, JTAG |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |