EP1SGX25FF1020I5 vs EP1SGX25FF1020I5N Vergleich
Detaillierter Direktvergleich von EP1SGX25FF1020I5 von Altera und EP1SGX25FF1020I5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1SGX25FF1020I5 - Stratix GX FPGA, 25.6K Logic Cells | Intel / Altera
EP1SGX25FF1020I5 ⚠ Letzte BestellmöglichkeitAltera
EP1SGX25FF1020I5N - Stratix GX FPGA, 25,660 LEs, FBGA-1020 | Altera
EP1SGX25FF1020I5N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1SGX25FF1020I5 | EP1SGX25FF1020I5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.490,00 | $2.050,00 |
| Family | Stratix GX | Stratix GX |
| Logic Cells | 25,660 | — |
| Configurable Logic Blocks (CLBs) | 2,566 | 2,566 |
| Maximum Internal Performance | 5000 MHz | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage (Nominal) | 1.5 V | — |
| Core Supply Voltage Range | 1.425 V to 1.575 V | — |
| Gehäuse | 1020-ball FC-FBGA (FF1020) | FBGA-1020 (33 x 33 mm, 1.00 mm pitch) |
| Terminal Form | Ball | — |
| Number of Terminals | 1020 | — |
| Temperature Grade (suffix I5) | Industrial | — |
| Combinatorial Delay (ES variant) | 7.49 ns max | — |
| Montageart | Surface Mount (Flip-Chip BGA) | Surface Mount (BGA) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant (per digchip) |
| Embedded Transceivers | Present (Stratix GX family) | — |
| Series | — | EP1SGX25 |
| Logic Elements (LEs) | — | 25,660 |
| Core Supply Voltage | — | 1.5 V |
| Maximum Operating Frequency | — | [DATA_NEEDED: datasheet fmax value] |
| Operating Temperature Grade | — | Industrial (I) |
| Betriebstemperaturbereich | — | 0 C to 85 C (per digchip listing) |
| Ball Count | — | 1020 |
| Terminal Pitch | — | 1.00 mm |
| Lead-Free Finish | — | Yes (lead-free, per digchip) |
| Logic Family | — | CMOS |
| Speed Grade | — | 5 |