EP1SGX40DF1020I6 vs EP1SGX40G Vergleich
Detaillierter Direktvergleich von EP1SGX40DF1020I6 von Intel und EP1SGX40G von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1SGX40DF1020I6 | EP1SGX40G |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $198,00 | $595,00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 41,250 | 41,250 |
| Configurable Logic Blocks (CLBs) | 4,125 | — |
| Embedded Memory Bits | 3,423,744 | — |
| Maximum User I/Os | 624 | — |
| Combinatorial Delay (CLB max) | 8.245 ns | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm CMOS | [DATA_NEEDED: process node] |
| Maximum Operating Frequency | [DATA_NEEDED: actual frequency in MHz] | — |
| Gehäuse | 1020-ball FC-FBGA | 1020-pin FineLine BGA |
| Package Code | BGA | — |
| Ball Pitch | 1.00 mm | — |
| Operating Temperature Grade | Industrial (I6) | — |
| Montageart | Surface Mount | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance] |
| MSL-Level | [DATA_NEEDED: moisture sensitivity level] | — |
| Total RAM Bits | — | 3,423,744 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Maximum User I/O Pins | — | 624 |
| Number of Transceivers | — | 20 |
| Maximum Transceiver Data Rate | — | 3.1875 Gbps |
| Minimum Transceiver Data Rate | — | 500 Mbps |
| Transceiver Channels per Bank | — | 4 |
| Supported Serial Standards | — | PCI Express, XAUI, Serial RapidIO, SerialLite II |
| 8B/10B Encoder/Decoder | — | Hardware (dedicated per channel) |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Speed Grades Available | — | C5, C6, C7, I5, I6, I7 |
| Operating Temperature Range (Commercial) | — | 0C to +85C |
| Operating Temperature Range (Industrial) | — | -40C to +100C |
| Configuration Method | — | EPC enhanced configuration devices, JTAG |
| Vertical Migration | — | Supported within 1020-pin FineLine BGA package (EP1SGX25/EP1SGX40) |