EP1SGX40FF1020C7 vs EP1SGX40FF1020C6 Vergleich
Detaillierter Direktvergleich von EP1SGX40FF1020C7 von Altera und EP1SGX40FF1020C6 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1SGX40FF1020C7 - Stratix GX FPGA 41,250 LE | Intel | 1020-BGA
EP1SGX40FF1020C7 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1SGX40FF1020C7 | EP1SGX40FF1020C6 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $750,00 | $195,00 |
| Series | Stratix GX | EP1SGX40 |
| Family | Stratix GX (EP1SGX40) | Stratix GX |
| Logic Elements (LE) | 41,250 | — |
| Configurable Logic Blocks (CLB) | 4,125 | — |
| Embedded Memory (bits) | 3,423,744 | — |
| User I/O Pins | 624 | — |
| Number of Logic Array Blocks (LAB) | 4,125 | — |
| Number of I/O Banks | 12 | — |
| Core Supply Voltage (VCCINT) | 1.425 V to 1.575 V (nominal 1.5 V) | — |
| Speed Grade | 7 (-7, mid-speed) | C6 |
| Process Technology | CMOS | — |
| Betriebstemperatur | 0 °C to 85 °C (commercial) | 0 C to 85 C (Commercial) |
| Gehäuse | 1020-ball FC-FBGA (S-PBGA-B1020) | 1020-ball FBGA (PBGA), 1.00 mm pitch, 33 x 33 mm |
| Package Dimensions | 33 mm × 33 mm | — |
| Ball Pitch | 1.00 mm | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant | Compliant |
| Configuration Modes | PS, PPS, PPA, JTAG, AS | — |
| DSP Blocks (9-bit) | 176 | — |
| Transceiver Channels | 20 full-duplex 3.1875 Gbps + 14 dedicated full-duplex 1.25 Gbps | — |
| PLLs | 8 enhanced + per-transceiver PLLs | — |
| Logic Elements (LEs) | — | 41,250 |
| Configurable Logic Blocks (CLBs) | — | 4,125 |
| Embedded Memory | — | 3,423,744 bits |
| Logic Family | — | CMOS, SRAM-based LUT |
| Core Supply Voltage | — | 1.5 V |
| High-Speed Transceivers | — | Up to 20 channels (Stratix GX) |
| Configuration Method | — | SRAM-based, external configuration device required |
| MSL-Level | — | [DATA_NEEDED: MSL Level] |