EP20K100CB356C7 vs EP20K200CB356C7N Vergleich
Detaillierter Direktvergleich von EP20K100CB356C7 von Intel und EP20K200CB356C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K100CB356C7 - APEX20K FPGA 100K Gates 252 I/O 356-BGA | Intel
EP20K100CB356C7 ⚠ Letzte BestellmöglichkeitIntel
EP20K200CB356C7N - APEX 20KC FPGA 200K Gates 356-BGA | Intel / Altera
EP20K200CB356C7N ObsoleteSpezifikationsvergleich
| Parameter | EP20K100CB356C7 | EP20K200CB356C7N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $71,00 | $92,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | APEX20K | EP20K200 |
| Typical Gates | 100,000 | — |
| Maximum Logic Elements | 53,248 | — |
| User I/O Pins | 252 | — |
| Gehäuse | 356-LBGA | 356-ball PBGA (S-PBGA) |
| Embedded Memory (Bits) | 53,248 | — |
| Number of PLLs | 4 | — |
| Core Voltage | 2.5 V | — |
| I/O Standards Supported | 1.8V, 2.5V, 3.3V, 5V (MultiVolt) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Process Technology | 0.18 μm CMOS | 0.15 um CMOS |
| Betriebstemperatur | Commercial grade | 0C to +85C (Commercial) |
| Speed Grade | C7 | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | unknown |
| Family | — | APEX 20KC |
| System Gates | — | 200,000 |
| Logic Elements / Cells | — | 8,320 |
| Maximum Operating Frequency | — | 3571.6 MHz (internal equivalent) |
| Propagation Delay | — | 1.48 ns |
| User I/Os | — | 263 |
| Input Terminals | — | 267 |
| Supply Voltage (Nominal) | — | 1.8 V |
| Montageart | — | Surface Mount |
| Embedded Memory | — | ESBs (dual-port RAM/ROM/FIFO) |
| Clock Management | — | PLL with up to 4 outputs |
| JTAG Support | — | Yes (IEEE 1149.1) |
| In-System Programmable | — | Yes |