EP20K100EFC324-1N vs EP20K100EFC324-2X Vergleich
Detaillierter Direktvergleich von EP20K100EFC324-1N von Altera und EP20K100EFC324-2X von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K100EFC324-1N | EP20K100EFC324-2X |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $108,00 | $99,50 |
| Family | APEX-20KE | APEX 20KE |
| Device Type | FPGA (Field Programmable Gate Array) | SPLD / FPGA (Field Programmable Gate Array) |
| Logic Elements (LEs) | 4160 | — |
| Typical Gates | 100,000 | — |
| Maximum User I/O | 246 | — |
| Embedded System Blocks (ESBs) | 53248 bits | — |
| Gehäuse | 324-BGA (FineLine BGA) | 324-ball FBGA (FineLine BGA), 19x19 mm, 1.27 mm pitch |
| Betriebstemperatur | 0 C to 85 C | 0 °C to 85 °C (Commercial) |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Internal Operating Frequency | 250 MHz | Up to 250 MHz |
| Core Voltage | 1.8 V | — |
| I/O Standard Support | LVDS, SSTL, HSTL, LVTTL, LVCMOS | — |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.22 µm CMOS (all-layer copper metal) |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Programming Technology | SRAM-based (volatile, requires configuration device) | — |
| MultiVolt I/O | 1.8 V core with 3.3 V / 5.0 V I/O support | — |
| System Gates | — | 100,000 gates |
| Logic Elements / Cells | — | 4,160 |
| Total RAM Bits | — | 53,248 bits |
| LABs / CLBs | — | 416 |
| Maximum User I/Os | — | 246 |
| Number of I/O Banks | — | 8 (per APEX 20KE family) |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | MultiVolt: 1.8 V / 2.5 V / 3.3 V |
| Speed Grade | — | -2X |
| Montageart | — | Surface Mount |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Configuration Modes | — | Passive Serial, Passive Parallel, JTAG, Altera configuration EPROM |
| RoHS-Status | — | [DATA_NEEDED: confirm against lot-specific documentation] |