EP20K100EQC208-1X vs EP20K100QC208-1 Vergleich
Detaillierter Direktvergleich von EP20K100EQC208-1X von Intel und EP20K100QC208-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K100EQC208-1X | EP20K100QC208-1 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $152,00 | $21,20 |
| Family | APEX-20KE | APEX 20K |
| Logic Elements | 4,160 | — |
| Typical Gate Count | 100,000 gates | — |
| Embedded Memory (bits) | 53,248 | — |
| Embedded System Blocks (ESBs) | 26 | — |
| Maximum User I/O | 151 | — |
| Gehäuse | 208-pin PQFP (EQC208) | PQFP-208 (Plastic Quad Flat Pack) |
| Process Technology | 0.15 micrometer CMOS, all-layer copper | 0.22 µm CMOS |
| Propagation Delay | 1.6 ns | — |
| Speed Grade | -1 (standard) | -1 |
| Betriebstemperatur | 0C to +85C | 0 °C to +85 °C (commercial) |
| Core Supply Voltage | 1.8 V | — |
| MultiVolt I/O Support | 1.8V / 2.5V / 3.3V / 5.0V | — |
| PLLs | 4 | — |
| Configuration Interface | JTAG (IEEE 1149.1), passive serial/parallel | — |
| MSL-Level | 3 (168 Hours) | — |
| RoHS-Status | Lead-free (Pb-free), RoHS compliant | unknown |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Equivalent Logic Gates | — | 100,000 |
| Typical Gates | — | 26,624 |
| Logic Elements / Cells | — | 4,160 |
| Embedded RAM | — | 53,248 bits |
| Maximum Operating Frequency | — | 250 MHz |
| Propagation Delay (tPD) | — | 1.6 ns |
| Supply Voltage (Core) | — | 2.5 V |
| Number of PLLs | — | 4 |
| Pin-Anzahl | — | 208 |
| Montageart | — | Surface Mount |
| User I/Os (max) | — | [DATA_NEEDED: exact user-IO count for PQFP-208] |
| Configuration | — | SRAM-based, volatile |