EP20K100FC144-1 vs EP20K100CF144C7 Vergleich

Detaillierter Direktvergleich von EP20K100FC144-1 von Altera und EP20K100CF144C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K100FC144-1 EP20K100CF144C7
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $78,50 $28,40
Series APEX-20K APEX-20K
Family APEX-20K APEX-20K Field Programmable Gate Array
Typical Gates 100,000 —
Logic Elements 4,160 —
Embedded RAM Bits 53,248 —
User I/O Pins 93 —
Number of Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] —
Number of Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] —
Number of Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count] —
Core Voltage 2.5 V —
I/O Voltage 3.3 V (PCI-compatible) —
Speed Grade -1 (slowest) C7 (commercial)
Betriebstemperatur [DATA_NEEDED: temperature grade] 0C to +85C (commercial)
Gehäuse 144-LQFP —
Montageart Surface Mount Surface Mount
Programmable Interface JTAG / IEEE 1532 (ISP) —
PCI Compliance 3.3V PCI compliant —
RoHS-Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Logic Elements / Cells — 4,160
Total RAM Bits — 53,248
Number of Logic Elements — 4,160
Number of I/O — 93
Number of Gates — 100,000 system gates
Voltage - Supply — 1.8 V core, 3.3 V I/O (typical APEX-20K rails)
Gehäuse / Bauform — 144-LQFP
Package Dimensions — 22 x 22 mm, 0.5 mm pitch
Process Technology — 0.18 micron CMOS SRAM
Configuration Mode — Passive Serial, JTAG (IEEE 1149.1)
PLLs — 4 (per APEX-20K family architecture)

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