EP20K100FC324-2X vs EP20K100FC324-1V Vergleich
Detaillierter Direktvergleich von EP20K100FC324-2X von Altera und EP20K100FC324-1V von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K100FC324-2X - APEX 20K FPGA 100K Gates 324-BGA | Intel / Altera
EP20K100FC324-2X Obsolete
Spezifikationsvergleich
| Parameter | EP20K100FC324-2X | EP20K100FC324-1V |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $110,11 | $118,40 |
| Family | APEX-20K | — |
| Logic Elements | 4,160 | — |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 263,000 | — |
| Maximum User I/O | 252 | — |
| Embedded RAM Bits | 53,248 | — |
| Operating Frequency (max) | 200 MHz | — |
| Propagation Delay | 1.6 ns | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 3.3 V (5 V tolerant I/O) | — |
| Gehäuse | 324-ball FineLine BGA (FBGA) | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0 °C to +85 °C (Commercial) | 0C to +85C (commercial) |
| Configuration Interface | JTAG (IEEE 1149.1) / Serial / Parallel | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS compliance] |
| Series | — | APEX-20K® |
| Number of Logic Elements / Cells | — | 4160 |
| Total RAM Bits | — | 53248 |
| Number of Gates (typical) | — | 100000 |
| Number of I/O | — | 252 |
| Number of LABs/CLBs | — | [DATA_NEEDED: number of Logic Array Blocks] |
| Number of EABs | — | [DATA_NEEDED: number of Embedded Array Blocks] |
| Supply Voltage - Core (VCCINT) | — | 2.375 V to 2.625 V |
| Supply Voltage - I/O (VCCIO) | — | 3.0 V / 3.3 V / 5.0 V tolerant (per I/O standard) |
| Speed Grade | — | -1V (commercial) |
| Gehäuse / Bauform | — | 324-FBGA (FineLine BGA, 19x19 mm) |
| Supplier Device Package | — | 324-FBGA |
| Number of PLLs | — | 4 |
| I/O Standards Supported | — | LVCMOS, LVTTL, PCI, SSTL, GTL+, HSTL |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |
| Programming Interface | — | JTAG (IEEE 1149.1) / in-system |