EP20K100QC240-2 vs EP20K100QC240-3N Vergleich
Detaillierter Direktvergleich von EP20K100QC240-2 von Altera und EP20K100QC240-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K100QC240-2 | EP20K100QC240-3N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $0,00 |
| Series | APEX-20K | — |
| Device Type | Field Programmable Gate Array (FPGA) | FPGA |
| Number of Logic Elements/Cells | 4160 | — |
| Number of LABs/CLBs | 416 | — |
| Number of User I/Os | 189 | — |
| Total RAM Bits | 53248 | — |
| Typical Gate Count | 100000 | — |
| Maximum System Gates | 263000 | — |
| Betriebsversorgungsspannung | 2.375 V to 2.625 V (2.5 V nominal) | — |
| Betriebstemperaturbereich | 0°C to 85°C (TJ) | — |
| Maximum Internal Frequency | 200 MHz | — |
| Propagation Delay | 3 ns | — |
| Gehäuse / Bauform | 240-BFQFP (PQFP-240) | — |
| Number of Pins / Terminals | 240 | — |
| Terminal Pitch | 0.5 mm | — |
| Montageart | Surface Mount | Surface Mount |
| Technology / Process | CMOS, 0.22 µm | — |
| Speed Grade | -2 | — |
| RoHS-Status | Unknown | unknown |
| Family | — | APEX-20K |
| Gate Count | — | 100000 gates |
| Logic Cells | — | 4160 cells |
| User I/O | — | 189 I/O |
| Distributed Memory | — | 53248 bits |
| Macrocells | — | 416 macrocells |
| Versorgungsspannung | — | 2.375 V to 2.625 V |
| Nominal Supply | — | 2.5 V |
| Maximum Frequency | — | 167 MHz |
| Betriebstemperatur | — | 0 C to 85 C |
| Gehäuse | — | 240-BFQFP |
| Pin-Anzahl | — | 240 pins |
| Fabrication Process | — | 0.15 um all-layer copper-metal process |
| Package Pitch | — | 1.27 mm |
| Package Dimensions | — | 45 mm x 45 mm |
| AEC-Q100 | — | not_qualified |