EP20K100QC240-3 vs EP20K100QC240-1 Vergleich

Detaillierter Direktvergleich von EP20K100QC240-3 von Altera und EP20K100QC240-1 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Altera
EP20K100QC240-3 EP20K100QC240-3 - 189 I/O APEX-20K FPGA | Altera

EP20K100QC240-3 - 189 I/O APEX-20K FPGA | Altera

EP20K100QC240-3 ✓ Aktiv

Spezifikationsvergleich

Parameter EP20K100QC240-3 EP20K100QC240-1
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $24,50 $98,00
Manufacturer Altera —
FPGA Family APEX-20K —
Number of Logic Elements 4160 cells —
Total RAM Bits 53248 bits —
Number of User I/O 189 —
Typical Gate Count 263000 gates —
Core Supply Voltage 2.5 V 2.5 V
Maximale Taktfrequenz 167 MHz (family rating) —
Speed Grade -3 -1
Technology Process 0.22 um —
Package Type 240-BFQFP —
Anzahl der Pins 240 —
Montageart Surface Mount Surface Mount
Betriebstemperaturbereich 0 °C to +85 °C (commercial) —
Propagation Delay [DATA_NEEDED: propagation delay timing table] 1.6 ns (per datasheet, typical)
Supported I/O Standards [DATA_NEEDED: supported I/O standards] —
Configuration / JTAG Interface [DATA_NEEDED: configuration and JTAG interface details] —
RoHS Compliance [DATA_NEEDED: RoHS compliance for non-N version] —
Family — APEX 20K
Device Type — FPGA (Field-Programmable Gate Array)
Logic Elements (LEs) — 4,160
Typical Gates — 100,000
Maximum User I/O — 189
Embedded RAM Bits — 53,248
Process Technology — 0.22 µm CMOS
Maximum Internal Frequency — 250 MHz
Gehäuse — 240-pin PQFP (QFP-240)
Package Code — S-PQFP-G240
Terminal Form — Gull Wing
Betriebstemperatur — 0 °C to +85 °C (Commercial)
JTAG Support — IEEE 1149.1 Boundary Scan
Programming — In-system (SRAM-based) via Quartus / MAX+PLUS II

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