EP20K100QI208-2 vs EP20K100QC208-2 Vergleich

Detaillierter Direktvergleich von EP20K100QI208-2 von Altera und EP20K100QC208-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K100QI208-2 EP20K100QC208-2
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $0,00 $29,90
Series APEX-20K —
Product Type Field Programmable Gate Array (FPGA) —
Number of Logic Elements / Cells 4160 —
Total RAM Bits 53248 53248
Number of User I/Os 159 159
Gehäuse / Bauform 208-BFQFP 208-BFQFP (208-PQFP 28x28)
Anzahl der Pins 208 —
Terminal Form Gull wing Gull wing
Terminal Pitch 0.500 mm —
Package Shape Square —
JESD-30 Code S-PQFP-G208 —
Moisture Sensitivity Level 3 (168 hours) —
Montageart Surface Mount Surface Mount
Speed Grade -2 —
Versorgungsspannung [DATA_NEEDED: core supply voltage for exact OPN from APEX-20K datasheet] —
Betriebstemperatur [DATA_NEEDED: exact industrial temperature range; I-grade variant] 0°C to 85°C (TJ)
RoHS-Status unknown for non-N ordering code unknown
Manufacturer — Altera
Product Series — APEX-20K
Device Type — Field Programmable Gate Array (FPGA)
Logic Elements / Cells — 4160
Number of LABs / CLBs — 416
Number of Gates — 263000
Number of Terminals — 208
Supply Voltage (VCC) — 1.71 V ~ 1.89 V (per one distributor listing; verify against APEX-20K datasheet)
I/O Standard Support — [DATA_NEEDED: I/O standard support]
Maximum Propagation Delay (-2 speed grade) — [DATA_NEEDED: max tPD for -2 speed grade]
Configuration Technology — [DATA_NEEDED: configuration technology details]
MSL-Level — [DATA_NEEDED: MSL level]
Product Lifecycle — NRND / legacy source through Rochester Electronics

Datenblätter & Ressourcen

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