EP20K1500CF33C8 vs EP20K1000CF33I8N Vergleich
Detaillierter Direktvergleich von EP20K1500CF33C8 von Altera und EP20K1000CF33I8N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K1500CF33C8 | EP20K1000CF33I8N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.090,00 | $210,00 |
| Family | APEX 20K | APEX 20KC |
| Logic Elements / Cells | 51,840 | — |
| Total RAM Bits | 442,368 | — |
| Number of Gates (typical) | 1,500,000 | — |
| Number of I/O | 808 (maximum user I/O) | — |
| Number of LABs/CLBs | 2,592 LABs (organized in MegaLABs) | — |
| Number of Embedded System Blocks | 216 ESBs | — |
| Number of PLLs | 4 | — |
| Supply Voltage (VCCINT) | 1.8 V (typical for APEX 20K core) | — |
| Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| Betriebstemperatur | 0 °C to +85 °C (Commercial) | -40 °C to +85 °C (industrial) |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Gehäuse / Bauform | 1020-BBGA, FCBGA (FineLine BGA) | — |
| Number of Terminals | 1020 balls | — |
| Process Technology | 0.18 µm CMOS, SRAM-based configuration | 0.15 µm CMOS |
| Configuration | SRAM-based, JTAG (IEEE 1149.1) | — |
| RoHS-Status | Compliant per distributor listings | [DATA_NEEDED: rohs status] |
| Lead-Free | Yes (per distributor specifications) | — |
| Logic Elements | — | 38,400 cells |
| System Gates | — | 1,000,000 (approx.) |
| Maximum Internal Clock Frequency | — | 301.21 MHz |
| Propagation Delay | — | 1.79 ns |
| Number of Logic Elements / Cells | — | 38,400 |
| Core Supply Voltage | — | 1.8 V nominal (1.71 V to 1.89 V) |
| Number of I/O Pins | — | 700 user I/O |
| Anzahl der Pins | — | 1020 |
| Package Type | — | FC-FBGA-1020 (Flip-Chip Fine-pitch BGA) |
| Embedded Memory | — | Dual-port RAM via ESB blocks |
| PLL Count | — | 4 |
| Configuration Interface | — | IEEE 1149.1 JTAG, EPC serial/parallel |
| Speed Grade | — | I8 |