EP20K200BC356-1 vs EP20K200CB356C7ES Vergleich
Detaillierter Direktvergleich von EP20K200BC356-1 von Altera und EP20K200CB356C7ES von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K200BC356-1 | EP20K200CB356C7ES |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $335,00 | $108,50 |
| Product Function | APEX-20K Field Programmable Gate Array (FPGA) | — |
| Logic Family | CMOS | — |
| Equivalent System Gates | 200K gates | — |
| Logic Elements / Cells | 8320 | 8,320 |
| Total RAM Bits | 106496 bits | — |
| Maximale Taktfrequenz | 250 MHz | — |
| Core Supply Voltage | 2.5 V | — |
| User I/O Count | 277 | — |
| Anzahl der Pins | 356 | — |
| Gehäuse / Bauform | 356-LBGA | — |
| Package Code | LBGA | — |
| Package Shape | Square | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Process Technology | 0.22 um | 0.15 µm CMOS |
| Propagation Delay (tPD) | 2.5 ns (from -1N variant listing) | — |
| Betriebstemperaturbereich | 0 to 85 C (commercial, per -1N variant listing) | — |
| RoHS-Status | [DATA_NEEDED: RoHS/lead finish of original non-N EP20K200BC356-1] | [DATA_NEEDED: rohs status] |
| Lead-Free Finish | [DATA_NEEDED: original non-N finish not specified; N suffix indicates lead-free] | — |
| Family | — | APEX 20KC |
| System Gates | — | 200,000 |
| Maximum User I/O | — | 271 |
| Gehäuse | — | 356-Ball BGA (CB) |
| Core Voltage | — | 1.8 V |
| Operating Frequency (max) | — | 375.94 MHz |
| Embedded Memory Blocks | — | Yes (ESB - True Dual-Port / CAM) |
| PLLs | — | 4 |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+ |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1) |
| Operating Temperature Grade | — | Commercial (0°C to +70°C) |