EP20K200BC356-1 vs EP20K200EBC356-1N Vergleich
Detaillierter Direktvergleich von EP20K200BC356-1 von Altera und EP20K200EBC356-1N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K200BC356-1 | EP20K200EBC356-1N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $335,00 | $171,00 |
| Product Function | APEX-20K Field Programmable Gate Array (FPGA) | — |
| Logic Family | CMOS | — |
| Equivalent System Gates | 200K gates | — |
| Logic Elements / Cells | 8320 | 8,320 |
| Total RAM Bits | 106496 bits | — |
| Maximale Taktfrequenz | 250 MHz | — |
| Core Supply Voltage | 2.5 V | — |
| User I/O Count | 277 | — |
| Anzahl der Pins | 356 | — |
| Gehäuse / Bauform | 356-LBGA | — |
| Package Code | LBGA | — |
| Package Shape | Square | — |
| Montageart | Surface Mount | Surface Mount |
| Process Technology | 0.22 um | 0.22 um CMOS |
| Propagation Delay (tPD) | 2.5 ns (from -1N variant listing) | — |
| Betriebstemperaturbereich | 0 to 85 C (commercial, per -1N variant listing) | — |
| RoHS-Status | [DATA_NEEDED: RoHS/lead finish of original non-N EP20K200BC356-1] | [DATA_NEEDED: RoHS status] |
| Lead-Free Finish | [DATA_NEEDED: original non-N finish not specified; N suffix indicates lead-free] | — |
| Family | — | APEX 20KE |
| Series | — | APEX-20KE |
| Typical Gates | — | 200,000 |
| Number of Macrocells | — | 832 |
| User I/Os | — | 271 |
| Propagation Delay | — | 2.5 ns |
| Internal Frequency (max) | — | 367 MHz |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (nominal 1.8 V) |
| I/O Supply Voltage | — | MultiVolt 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| Gehäuse | — | 356-BGA (LBGA, 35 x 35 mm) |
| Betriebstemperatur | — | 0 C to +85 C (commercial) |
| MSL-Level | — | 3 (168 hours) |
| Logic Family / Architecture | — | CMOS, MultiCore (LUT + embedded memory) |
| Configuration Method | — | SRAM-based, in-system programmable |