EP20K200BC356-2XV vs EP20K200BC356-2 Vergleich
Detaillierter Direktvergleich von EP20K200BC356-2XV von Altera und EP20K200BC356-2 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K200BC356-2XV - APEX-20K FPGA, 8320 LE, 356-BGA | Altera/Intel
EP20K200BC356-2XV ObsoleteSpezifikationsvergleich
| Parameter | EP20K200BC356-2XV | EP20K200BC356-2 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $45,00 | $88,25 |
| Family | APEX-20K | — |
| Series | APEX-20K® | APEX-20K |
| Number of LABs/CLBs | 832 | — |
| Number of Logic Elements / Cells | 8320 | — |
| Total RAM Bits | 106496 | — |
| Number of I/O | 277 | — |
| Number of Gates | 526000 | — |
| Core Voltage Supply | 2.375 V to 2.625 V | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Betriebstemperatur | 0 °C to 85 °C (TJ) | 0 °C to +85 °C (commercial) |
| Gehäuse / Bauform | 356-LBGA (Ball Grid Array) | — |
| Speed Grade | -2 | -2 |
| Configuration Memory | SRAM-based (volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance flag] | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | APEX-20K (MultiCore PLD) |
| Logic Elements | — | 8,320 |
| Typical Gate Count | — | 200,000 gates |
| Embedded Memory | — | 106,496 bits |
| User I/Os | — | 277 |
| Logic Family | — | CMOS |
| Process Technology | — | 0.22 µm |
| Propagation Delay | — | 2.5 ns |
| Core Supply Voltage | — | 2.5 V |
| Gehäuse | — | 356-LBGA (35 mm × 35 mm) |
| Maximum Frequency | — | 200 MHz |