EP20K200BC356-3 vs EP20K200BC356-1 Vergleich
Detaillierter Direktvergleich von EP20K200BC356-3 von Intel und EP20K200BC356-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K200BC356-3 | EP20K200BC356-1 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $162,00 | $335,00 |
| Series | APEX-20K | — |
| Family | APEX 20K (MultiCore) | — |
| Logic Elements / Cells | 8320 | 8320 |
| Embedded Memory Bits | 106496 | — |
| Number of Macrocells | 832 | — |
| User I/Os | 277 | — |
| Gehäuse | 356-LBGA | — |
| Total Package Pins | 356 | — |
| Supply Voltage (Core) | 2.5 V | — |
| Technology | 0.22 µm CMOS | — |
| Maximum Internal Frequency | 167 MHz | — |
| Propagation Delay | 2.5 ns | — |
| Logic Family | CMOS | CMOS |
| Betriebstemperatur | 0 °C to +85 °C (Commercial) | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Configuration Interface | IEEE 1149.1 JTAG | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS/lead finish of original non-N EP20K200BC356-1] |
| Product Function | — | APEX-20K Field Programmable Gate Array (FPGA) |
| Equivalent System Gates | — | 200K gates |
| Total RAM Bits | — | 106496 bits |
| Maximale Taktfrequenz | — | 250 MHz |
| Core Supply Voltage | — | 2.5 V |
| User I/O Count | — | 277 |
| Anzahl der Pins | — | 356 |
| Gehäuse / Bauform | — | 356-LBGA |
| Package Code | — | LBGA |
| Package Shape | — | Square |
| Process Technology | — | 0.22 um |
| Propagation Delay (tPD) | — | 2.5 ns (from -1N variant listing) |
| Betriebstemperaturbereich | — | 0 to 85 C (commercial, per -1N variant listing) |
| Lead-Free Finish | — | [DATA_NEEDED: original non-N finish not specified; N suffix indicates lead-free] |