EP20K200BC484-1X vs EP20K200CF484C7ES Vergleich
Detaillierter Direktvergleich von EP20K200BC484-1X von Altera und EP20K200CF484C7ES von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K200BC484-1X - APEX-20K 200K-Gate FPGA 382 I/O 484-BGA | Altera
EP20K200BC484-1X ObsoleteSpezifikationsvergleich
| Parameter | EP20K200BC484-1X | EP20K200CF484C7ES |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $75,10 | $92,00 |
| Product Family | APEX-20K | — |
| Series | EP20K200 | APEX 20KC |
| Logic Elements / Cells | 8320 | 8,320 |
| Total RAM Bits | 106496 | 106,496 |
| Number of I/O | 382 | 377 (max) |
| Number of Logic Gates | 200000 | — |
| Package Type | 484-BBGA (Fine-pitch Ball Grid Array) | — |
| Package Suffix | BC484 | — |
| Speed Grade | -1 (slowest commercial grade) | C7 (7 ns) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +85C (commercial, [DATA_NEEDED: full Tjj range]) | 0C to +85C (commercial) |
| Configuration Method | SRAM - external serial/parallel PROM | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| PLL | ClockLock / ClockBoost | — |
| Embedded Memory Blocks | Embedded System Blocks (ESBs) - RAM/ROM/CAM | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs_status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Family | — | APEX-20KC |
| Typical Gates | — | 200,000 |
| Number of LABs/CLBs | — | 376 |
| Voltage - Supply | — | 1.8 V core |
| Gehäuse / Bauform | — | 484-BBGA (FineLine BGA) |
| Process Technology | — | 0.18 µm CMOS |
| Silicon Status | — | ES (Engineering Sample) |
| Maximum Internal Frequency | — | 375.94 MHz |
| Number of PLLs | — | [DATA_NEEDED: pll_count] |