EP20K200CF484C8N vs EP20K200CF484C8ES Vergleich
Detaillierter Direktvergleich von EP20K200CF484C8N von Intel und EP20K200CF484C8ES von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera
EP20K200CF484C8ES ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K200CF484C8N | EP20K200CF484C8ES |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $102,95 | $89,00 |
| Family | APEX 20KC | APEX 20K |
| Logic Elements (LEs) | 8,320 | — |
| System Gates | 200,000 | 200,000 |
| Embedded System Memory (Bits) | 106,496 | — |
| Maximum Operating Frequency | 301.21 MHz | — |
| Process Technology | 0.15 µm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt) | — |
| Gehäuse | 484-ball FBGA (FineLine BGA) | 484-pin FBGA (FineLine BGA) |
| Speed Grade | -8 | C8 (-8 commercial) |
| Operating Temperature (Commercial) | 0 °C to +85 °C | — |
| Lead-Free / Pb-Free | Yes (suffix 'N') | — |
| Number of I/O Pins | [DATA_NEEDED: max user I/O count for FBGA-484 package] | — |
| Configuration Method | JTAG / Serial / Passive Parallel | — |
| Embedded Memory Type | True dual-port / single-port RAM (ESB) | — |
| PLL Count | [DATA_NEEDED: PLL count for EP20K200 family] | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant (Pb-free suffix) | — |
| Series | — | APEX-20KC |
| Logic Elements | — | 8,320 |
| Embedded Memory (RAM bits) | — | 106,496 |
| Number of Logic Array Blocks (LABs) | — | 104 |
| Number of Embedded System Blocks (ESBs) | — | 13 |
| User I/O Pins (max) | — | 376 |
| PLLs | — | 4 |
| Core Voltage | — | 1.8 V |
| Betriebstemperatur | — | 0C to +85C (commercial) |
| Process Node | — | 0.18 micron CMOS |
| Configuration Interface | — | JTAG (IEEE 1149.1) / Altera serial |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP |
| Lead Free / RoHS | — | [DATA_NEEDED: lead-free status] |