EP20K200CF484I7 vs EP20K200CF484I9 Vergleich
Detaillierter Direktvergleich von EP20K200CF484I7 von Altera und EP20K200CF484I9 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K200CF484I7 - APEX 20KC 200K Gates FPGA 1.8V FBGA-484 | Altera
EP20K200CF484I7 ⚠ Letzte Bestellmöglichkeit
Spezifikationsvergleich
| Parameter | EP20K200CF484I7 | EP20K200CF484I9 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $89,50 | $138,00 |
| Family | APEX 20KC | APEX 20KC (APEX 20K with ESB/CAM) |
| Logic Elements | 8,320 | — |
| Typical Gate Count | 200,000 system gates | — |
| Maximum Operating Frequency | 375.94 MHz (per device-family data) | — |
| Process Technology | 0.15 µm CMOS with copper interconnect | 0.15 um CMOS |
| Internal Supply Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Supply Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) | — |
| User I/O Pins | 376 | — |
| Dedicated Inputs | 4 | 4 |
| Gehäuse | 484-pin FBGA (FineLine BGA) | 484-ball FineLine BGA (FBGA), 1.00 mm pitch |
| Package Body Size | 23 mm × 23 mm | — |
| Ball Pitch | 1.000 mm | — |
| Speed Grade | -7 | -9 (lowest speed in EP20K200 family) |
| Temperature Grade (I7 suffix) | Industrial, -40 °C to +85 °C | — |
| Configuration Technology | SRAM-based, re-programmable in-system | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | unknown - confirm with supplier (legacy part) |
| Propagation Delay | [DATA_NEEDED: datasheet-specified tpd] | — |
| Series | — | APEX 20KC |
| Typical Gates | — | 200,000 |
| Logic Elements (Cells) | — | 8,320 |
| Maximum User I/O | — | 376 |
| Total Terminals | — | 484 (balls) |
| Core Supply Voltage (VCCINT) | — | 1.8 V nominal (1.71 V to 1.89 V) |
| Operating Temperature Grade | — | Industrial (I) |
| Junction Temperature Range | — | -40 C to +100 C |
| Configuration Method | — | SRAM, JTAG in-system programmable |
| Lifecycle | — | Obsolete - EOL announced by Altera/Intel in 2008 |