EP20K200CF484I9N vs EP20K200CF484I7 Vergleich
Detaillierter Direktvergleich von EP20K200CF484I9N von Altera und EP20K200CF484I7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K200CF484I7 - APEX 20KC 200K Gates FPGA 1.8V FBGA-484 | Altera
EP20K200CF484I7 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K200CF484I9N | EP20K200CF484I7 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $115,00 | $89,50 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements / Cells | 8,320 | — |
| Maximum Gates | 200,000 | — |
| Maximum Internal Frequency | 250 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS with copper interconnect |
| Core Supply Voltage | 1.8 V nominal (1.71 V to 1.89 V) | — |
| Gehäuse | 484-pin FBGA (PBGA484), 1.0 mm pitch | 484-pin FBGA (FineLine BGA) |
| User I/O Count | 376 (368 user I/O + 4 dedicated inputs) | — |
| Speed Grade | I9 (industrial, highest-performance bin) | -7 |
| Betriebstemperatur | [DATA_NEEDED: industrial temperature range -40C to +85C assumed for I-grade] | — |
| Programmable I/O Standards | LVTTL, LVCMOS, PCI | — |
| Configuration Interface | JTAG IEEE 1149.1, ByteBlaster/BitBlaster serial | — |
| On-chip Memory | Embedded System Blocks (ESBs) for distributed RAM/ROM | — |
| Lead-Free (Pb-free) | Yes (N suffix) | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements | — | 8,320 |
| Typical Gate Count | — | 200,000 system gates |
| Maximum Operating Frequency | — | 375.94 MHz (per device-family data) |
| Internal Supply Voltage (VCCINT) | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Supply Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) |
| User I/O Pins | — | 376 |
| Dedicated Inputs | — | 4 |
| Package Body Size | — | 23 mm × 23 mm |
| Ball Pitch | — | 1.000 mm |
| Temperature Grade (I7 suffix) | — | Industrial, -40 °C to +85 °C |
| Configuration Technology | — | SRAM-based, re-programmable in-system |
| Propagation Delay | — | [DATA_NEEDED: datasheet-specified tpd] |