EP20K200EBC356-1 vs EP20K200CB356C9 Vergleich
Detaillierter Direktvergleich von EP20K200EBC356-1 von Altera und EP20K200CB356C9 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K200EBC356-1 | EP20K200CB356C9 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $142,00 | $69,95 |
| Family | APEX 20K (APEX 20KE) | APEX 20KC |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | 8,320 |
| Maximum User I/Os | 277 | — |
| Core Voltage | 1.8 V (1.71 V to 1.89 V) | 1.8 V |
| Process Technology | 0.22 µm CMOS | 0.15 μm CMOS |
| Propagation Delay | 2.5 ns | — |
| Internal Performance | Up to 367 MHz | — |
| Gehäuse | 356-ball LBGA (35 x 35 mm) | — |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Betriebstemperatur | 0 °C to 85 °C (Commercial) | 0 °C to +85 °C (commercial, C-grade) |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| On-chip Memory | Embedded System Blocks (ESB / SRAM) | — |
| Configuration Method | JTAG (ByteBlaster / MasterBlaster), passive serial | SRAM-based, JTAG / passive serial / passive parallel |
| Development Software | Altera Quartus II | — |
| RoHS-Status | [DATA_NEEDED: RoHS status not stated in verified sources] | [DATA_NEEDED: RoHS compliance status] |
| Lebenszyklusstatus | Obsolete / EOL | Not Recommended for New Designs (NRND) |
| Total RAM Bits | — | 106,496 |
| Typical Gate Count | — | 200,000 |
| Number of User I/O | — | 271 |
| Number of Logic Gates | — | [DATA_NEEDED: total usable gates] |
| Maximum Internal Frequency | — | 250 MHz |
| Package Type | — | 356-LBGA |
| Anzahl der Pins | — | 356 |
| Embedded Memory | — | Embedded System Blocks (ESB) - dual-port RAM, ROM, CAM |