EP20K200EBC652-2X vs EP20K100EBC652-2X Vergleich
Detaillierter Direktvergleich von EP20K200EBC652-2X von Altera und EP20K100EBC652-2X von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K200EBC652-2X | EP20K100EBC652-2X |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $195,00 | $85,00 |
| Series | APEX-20KE® | — |
| Family | APEX-20KE | APEX 20KE |
| Device Logic Elements | 8,320 | — |
| Number of LABs/CLBs | 832 | — |
| Total RAM Bits | 106,496 | — |
| Number of I/O Pins | 376 | — |
| Number of Gates | 200,000 (typical) | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Operating Temperature (TJ) | 0C to +85C | — |
| Gehäuse | 652-BGA | 652-ball BGA (EBC652) |
| Montageart | Surface Mount | Surface Mount |
| Process Technology | 0.18 um CMOS | 0.18 µm CMOS, SRAM-based |
| I/O Standard Support | LVTTL, LVCMOS, LVDS, PCI, GTL+, SSTL | — |
| Configuration Method | Serial or Parallel PROM, JTAG (IEEE 1149.1) | Passive Serial / Passive Parallel / JTAG (EPC) |
| Lead-Free / RoHS | Compliant (per DigiKey listing) | — |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Logic Elements | — | 4,160 |
| Embedded System Blocks (ESBs) | — | 26 |
| Maximum RAM Bits | — | 53,248 |
| Maximum User I/O Pins | — | 246 |
| Supply Voltage - Core | — | 1.8 V |
| Supply Voltage - I/O | — | 1.8 V / 2.5 V / 3.3 V |
| Speed Grade | — | -2 (faster commercial) |
| Betriebstemperatur | — | 0C to +85C (commercial) |
| Clock Resources | — | Up to 4 DLLs, multiple global clocks |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |