EP20K200EBC652-3N vs EP20K200EQC208-3 Vergleich
Detaillierter Direktvergleich von EP20K200EBC652-3N von Altera und EP20K200EQC208-3 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K200EBC652-3N | EP20K200EQC208-3 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $220,00 | $65,00 |
| Series | APEX 20KE (APEX-20KE®) | APEX 20K (enhanced "E" variant) |
| Device Family | EP20K200 | — |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | — |
| Logic Array Blocks (LABs) | 832 | — |
| Macrocells | 832 | — |
| Embedded RAM | 106,496 bits | — |
| User I/Os (DigiKey listing) | 376 | — |
| User I/Os (digchip listing) | 277 | — |
| Propagation Delay | 2.33 ns | — |
| Internal Frequency (max) | 189 MHz | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 1.71 V to 1.89 V (nominal 1.8 V) | — |
| I/O Supply (LVDS-capable) | LVDS, 2.5 V referenced (per source variant) | — |
| Gehäuse | 652-ball BGA | 208-BFQFP / PQFP208 (Plastic Quad Flat Pack, gull-wing) |
| Montageart | Surface Mount | Surface Mount |
| Operating Temperature (TJ) | 0 °C to 85 °C (commercial) | — |
| Speed Grade | -3 (slowest in APEX 20KE family) | -3 |
| Configuration | JTAG (IEEE 1149.1), Passive Serial | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Family | — | APEX 20KE |
| Product Type | — | FPGA (Field Programmable Gate Array), SRAM-based, in-system programmable |
| System Gates (typical) | — | 200,000 |
| Logic Elements (LEs) | — | 8,320 |
| Embedded RAM Bits | — | 106,496 |
| Maximum User I/O | — | 136 |
| Core Supply Voltage (VCCINT) | — | 2.5 V (typical, APEX 20KE generation) |
| I/O Supply Voltage (VCCIO) | — | MultiVolt, 1.8 V / 2.5 V / 3.3 V / 5 V compatible |
| Terminal Pitch | — | 0.5 mm |
| Technology | — | CMOS, SRAM configuration cell |
| Configuration Mode | — | Fast Passive Parallel (FPP), Passive Serial (PS), JTAG (IEEE 1149.1) |
| Embedded Array Blocks (EABs) | — | Yes (dual-port RAM/ROM, up to 16-bit wide) |
| MultiVolt I/O Support | — | Yes |
| LVDS Support | — | True-LVDS (enhanced "E" variant feature) |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | 3 (168 Hours) |
| Operating Temperature (Commercial) | — | 0 °C to 85 °C |