EP20K200EQC208-3 vs EP20K100EQC208-3N Vergleich
Detaillierter Direktvergleich von EP20K200EQC208-3 von Intel und EP20K100EQC208-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K200EQC208-3 | EP20K100EQC208-3N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $65,00 | $9,75 |
| Family | APEX 20KE | — |
| Series | APEX 20K (enhanced "E" variant) | — |
| Product Type | FPGA (Field Programmable Gate Array), SRAM-based, in-system programmable | — |
| System Gates (typical) | 200,000 | — |
| Logic Elements (LEs) | 8,320 | — |
| Embedded RAM Bits | 106,496 | — |
| Maximum User I/O | 136 | — |
| Speed Grade | -3 | -3 |
| Core Supply Voltage (VCCINT) | 2.5 V (typical, APEX 20KE generation) | — |
| I/O Supply Voltage (VCCIO) | MultiVolt, 1.8 V / 2.5 V / 3.3 V / 5 V compatible | — |
| Gehäuse | 208-BFQFP / PQFP208 (Plastic Quad Flat Pack, gull-wing) | — |
| Terminal Pitch | 0.5 mm | [DATA_NEEDED: Terminal pitch] |
| Montageart | Surface Mount | Surface Mount |
| Technology | CMOS, SRAM configuration cell | — |
| Configuration Mode | Fast Passive Parallel (FPP), Passive Serial (PS), JTAG (IEEE 1149.1) | — |
| Embedded Array Blocks (EABs) | Yes (dual-port RAM/ROM, up to 16-bit wide) | — |
| MultiVolt I/O Support | Yes | — |
| LVDS Support | True-LVDS (enhanced "E" variant feature) | — |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | 3 (168 Hours) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | — |
| Operating Temperature (Commercial) | 0 °C to 85 °C | — |
| Product Family | — | APEX-20KE |
| FPGA Type | — | Field Programmable Gate Array |
| Number of Logic Elements | — | 4160 |
| Typical Gates | — | 100000 |
| System Gates | — | 263000 |
| Total RAM Bits | — | 53248 |
| Number of User I/O | — | 151 |
| Core Supply Voltage | — | 1.8 V |
| Maximale Taktfrequenz | — | 250 MHz |
| Package Type | — | 208-BFQFP (PQFP-208) |
| Anzahl der Pins | — | 208 |
| Betriebstemperaturbereich | — | 0 °C to +85 °C |
| Propagation Delay | — | 2.2 ns |
| Process Technology | — | [DATA_NEEDED: Process technology] |
| I/O Standards Supported | — | [DATA_NEEDED: Supported I/O standards] |
| Package Body Dimensions | — | [DATA_NEEDED: Package body dimensions] |
| MSL-Level | — | [DATA_NEEDED: MSL level] |