EP20K200FC484-1N vs EP20K200FC484-2X Vergleich

Detaillierter Direktvergleich von EP20K200FC484-1N von Altera und EP20K200FC484-2X von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K200FC484-1N EP20K200FC484-2X
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $118,00 $95,00
Family APEX 20K APEX 20K
Series APEX-20K® EP20K200
Logic Elements / Cells 8,320 —
System Gates 200,000 (approx.) —
Maximum User I/O 382 382
Number of Macros 832 —
Supply Voltage (Core) 2.5 V (2.375 V – 2.625 V) —
Process Technology 0.22 µm CMOS 0.22 µm CMOS
Propagation Delay 2.5 ns 3.0 ns
Maximum Internal Frequency 250 MHz 200 MHz
Betriebstemperatur 0 °C to +85 °C 0 °C to 85 °C (commercial)
Gehäuse 484-FBGA (23 x 23 mm) 484-pin FBGA (FineLine BGA), 1.0 mm pitch
Package Code BGA / FBGA —
Number of Pins/balls 484 —
Montageart Surface Mount Surface Mount
Lead-Free / RoHS Compliant (per distributor listings) —
Architecture MultiCore (LUT + product-term + embedded memory) —
Configuration Method SRAM-based, JTAG/ByteBlaster —
Device Type — FPGA (Field Programmable Gate Array)
Maximum Logic Elements — 8,320 cells
Typical System Gates — 200,000
Embedded Memory (EAB) — 106,496 bits
Number of Logic Elements — 8,320
Core Supply Voltage — 2.5 V
Speed Grade — -2 (with LVDS support, "X" suffix)
Programmable I/O Standards — 1.8 V, 2.5 V, 3.3 V, LVTTL, LVCMOS, LVDS
JTAG Support — IEEE 1149.1 Boundary-Scan
RoHS-Status — [DATA_NEEDED: RoHS compliance status]

Datenblätter & Ressourcen

Alle Produkte durchsuchen BOM erstellen Angebot anfordern