EP20K200FC484-3 vs EP20K200FC484-3N Vergleich
Detaillierter Direktvergleich von EP20K200FC484-3 von Intel und EP20K200FC484-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K200FC484-3 - APEX 20K 200K FPGA, 8320 Cells, BGA-484 | Intel (Altera)
EP20K200FC484-3 Nrnd
Spezifikationsvergleich
| Parameter | EP20K200FC484-3 | EP20K200FC484-3N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $210,00 | $92,50 |
| Family | APEX 20K | — |
| Logic Elements / Cells | 8320 cells | — |
| Equivalent Gates | 200,000 gates | — |
| Macrocells | 832 | — |
| User I/Os | 382 | — |
| On-chip Memory | 106,496 bits | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | — |
| Speed Grade | -3 | -3N |
| Maximum Internal Frequency | 167 MHz | — |
| Propagation Delay (typical) | 2.5 ns | — |
| Gehäuse | 484-pin FineLine BGA (FC) | — |
| Betriebstemperatur | 0 °C to 85 °C (commercial) | 0°C to +85°C (Commercial) |
| Architecture | MultiCore (LUT + product-term + ESB) | — |
| Configuration Interface | JTAG (IEEE 1149.1) | — |
| RoHS-Status | [DATA_NEEDED: rohs status] | Compliant (Pb-free package) |
| Series | — | APEX-20K |
| Manufacturer | — | Altera (Intel Programmable Solutions Group) |
| Logic Elements / Logic Cells | — | 8320 |
| System Gates | — | 200,000 |
| Total RAM Bits | — | 106,496 |
| Number of I/O | — | 382 |
| Number of Logic Blocks/Elements | — | 8320 |
| Supply Voltage (Core) | — | 1.71 V to 1.89 V |
| Supply Voltage (I/O) | — | MultiVolt 2.5 V / 3.3 V / 5.0 V |
| Propagation Delay | — | 2.5 ns (typical) |
| Montageart | — | Surface Mount |
| Gehäuse / Bauform | — | 484-BGA (FineLine BGA, 23x23 mm) |
| Supplier Device Package | — | 484-FBGA (23x23) |
| PLL Count | — | 4 |
| JTAG Support | — | Yes (IEEE 1149.1) |