EP20K200RC208-1 vs EP20K200RC208-1X Vergleich

Detaillierter Direktvergleich von EP20K200RC208-1 von Intel und EP20K200RC208-1X von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Intel
EP20K200RC208-1 EP20K200RC208-1 - APEX 20K 200K Gates FPGA, 208-Pin RQFP | Intel / Altera

EP20K200RC208-1 - APEX 20K 200K Gates FPGA, 208-Pin RQFP | Intel / Altera

EP20K200RC208-1 ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP20K200RC208-1 EP20K200RC208-1X
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Letzte Kaufgelegenheit Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $78,00 $35,80
Family APEX-20K APEX-20KE
Series APEX 20K (200K gates) —
System Gates 200,000 —
Logic Elements / Cells 8,320 —
Embedded Memory (bits) 106,496 —
Maximum User I/O 144 —
Number of PLLs 4 —
Process Technology 0.22 µm CMOS 0.18 µm CMOS
Core Supply Voltage 2.5 V —
I/O Standard Support LVTTL, LVCMOS, 2.5 V/3.3 V PCI, 1.8 V LVDS —
Maximum Internal Frequency 250 MHz —
Gehäuse 208-BFQFP (RQFP) with Exposed Pad, 28×28 mm 208-pin PQFP / RQFP (28x28 mm), 0.5 mm pitch
Montageart Surface Mount Surface Mount (gull-wing leads)
Configuration Interface Passive Serial, Passive Parallel, JTAG (IEEE 1149.1) IEEE 1149.1 JTAG, serial, passive parallel (PPA), EPC configuration devices
Betriebstemperatur Industrial range 0 °C to +85 °C (commercial)
RoHS-Status unknown Compliant (lead-free PQFP package)
MSL-Level [DATA_NEEDED: MSL Level] —
Logic Elements — 8,320 cells
Typical Gate Count — 200,000 gates
Embedded RAM Bits — 106,496 bits
Embedded RAM Blocks (ESBs) — 4 lanes / 52 ESBs
Maximum User I/O Pins — 144 (PQFP-208 variant)
Core Voltage — 1.8 V (±5%)
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS, GTL+
Speed Grade — -1X (1.8 V core, PQFP-208 pinout)
MultiCore Architecture — LUT logic + product-term logic + embedded memory
PLL Count — 4 enhanced PLLs (with programmable phase shift)
Moisture Sensitivity Level — MSL 3 (per JEDEC J-STD-020, applicable to PQFP)

Datenblätter & Ressourcen

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