EP20K200RC208-2 vs EP20K200RC208-1 Vergleich
Detaillierter Direktvergleich von EP20K200RC208-2 von Altera und EP20K200RC208-1 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K200RC208-1 - APEX 20K 200K Gates FPGA, 208-Pin RQFP | Intel / Altera
EP20K200RC208-1 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K200RC208-2 | EP20K200RC208-1 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $79,67 | $78,00 |
| Series | APEX-20K | APEX 20K (200K gates) |
| Family | APEX-20K MultiCore FPGA | APEX-20K |
| Logic Elements (LEs) | 8320 | — |
| System Gates | 200,000 (typical) | 200,000 |
| Embedded Memory (bits) | 106,496 | 106,496 |
| Maximum User I/O | 144 | 144 |
| Gehäuse | 208-BQFP / 208-RQFP with Exposed Pad | 208-BFQFP (RQFP) with Exposed Pad, 28×28 mm |
| Pin-Anzahl | 208 | — |
| Speed Grade | -2 (mid-speed, industrial) | — |
| Betriebstemperatur | -40C to +85C (industrial) | Industrial range |
| Supply Voltage (Core) | [DATA_NEEDED: core VCC] | — |
| Supply Voltage (I/O) | 3.3 V (multi-standard I/O) | — |
| Configuration Interface | JTAG (IEEE 1149.1) + Altera legacy scheme | Passive Serial, Passive Parallel, JTAG (IEEE 1149.1) |
| Process Technology | [DATA_NEEDED: process node] | 0.22 µm CMOS |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL Level] |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements / Cells | — | 8,320 |
| Number of PLLs | — | 4 |
| Core Supply Voltage | — | 2.5 V |
| I/O Standard Support | — | LVTTL, LVCMOS, 2.5 V/3.3 V PCI, 1.8 V LVDS |
| Maximum Internal Frequency | — | 250 MHz |