EP20K300EQC240-2XN vs EP20K300EQI240-3N Vergleich
Detaillierter Direktvergleich von EP20K300EQC240-2XN von Intel und EP20K300EQI240-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K300EQC240-2XN | EP20K300EQI240-3N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $12,40 | $97,20 |
| Series | APEX-20KE | EP20K300 |
| Number of Logic Elements / Cells | 11520 | — |
| Number of LABs/CLBs | 1152 | — |
| Number of Macrocells | [DATA_NEEDED: macrocells] | — |
| Maximum User I/O Pins | 152 | — |
| Total RAM Bits | 147456 | — |
| System Gates (datasheet) | 728000 | — |
| Family Gates (ordering code) | 300000 | — |
| Maximum Internal Clock | 350 MHz | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| Supply Voltage Range | 1.71 V to 1.89 V | — |
| Speed Grade | -2 | -3 |
| Betriebstemperaturbereich | 0 to +85 °C (TJ) | — |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| Gehäuse / Bauform | 240-PQFP / 240-BQFP (32x32 mm) | — |
| Montageart | Surface Mount | — |
| Lebenszyklusstatus | Obsolete (EOL) | — |
| Lead-Free | Yes (N suffix) | — |
| RoHS | unknown | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| ECCN | [DATA_NEEDED: ECCN] | — |
| Family | — | APEX 20KE |
| System Gates | — | 300,000 |
| Logic Elements | — | 11,520 |
| Embedded Memory (bits) | — | 147,456 |
| Maximum User I/O | — | 152 |
| Dedicated Inputs | — | 4 |
| Gehäuse | — | 240-pin BQFP/PQFP (PowerQuad Flat Pack) |
| Core Supply Voltage | — | 1.8 V nominal (1.71 V min, 1.89 V max) |
| I/O Standard Support | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (multi-volt I/O) |
| Betriebstemperatur | — | -40 °C to +105 °C (industrial 'I' grade) |
| RoHS-Status | — | [DATA_NEEDED: RoHS compliance from data] |
| Programming Interface | — | IEEE 1149.1 JTAG (ByteBlaster / MasterBlaster) |